Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2000-09-18
2002-09-10
Tran, M. (Department: 2818)
Static information storage and retrieval
Addressing
Sync/clocking
C365S193000
Reexamination Certificate
active
06449213
ABSTRACT:
BACKGROUND OF THE INVENTION
Memory systems typically include one or more memory storage devices that are interfaced to a memory controller through a bus. The memory controller controls the exchange of data between a central processing unit (CPU) or other processing device and the memory storage device.
Data is transferred between the memory controller and memory device over a collection of signal lines that form a bus. The signal lines carry address and command signals, data signals, clock signals, and other control signals between the memory controller and memory devices. Data signals are used to exchange the actual data that is stored in, and retrieved from, the memory device. Address signals specify the location within the memory device where the data is stored. Command signals, which are sometimes multiplexed over the same signal lines as address signals, are used to transfer commands that tell the memory device which operation to perform, e.g., read, write, refresh, etc. Clock signals are used to synchronize the address, command and data signals.
One type of clocking scheme is called common clock signaling. In a common clock system, a single clock signal is distributed from a common source to two different devices that are exchanging data. Neither the sending device nor the receiving device can control when the rising or falling edges of the clock signal occur.
Another type of clocking scheme is called source-synchronous signaling. With source-synchronous signaling, the device that sends data also generates a data strobe signal that travels toward the receiving device along with the data signals. Source-synchronous signaling eliminates some problems associated with common clock systems such as propagation delay, clock skew, etc., thereby increasing the maximum operating frequency. Since the data signals for a memory device typically operate at twice or four-times the frequency of the address and command signals, source-synchronous signaling has only been used with the data lines of conventional memory devices so as to increase the operating speed of the devices.
REFERENCES:
patent: 5919254 (1999-07-01), Pawlowski
patent: 6128700 (2000-10-01), Hsu et al.
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Betty Prince, “Semiconductor Memories”, 1983, Wisley, 2ndedition, pp. 52-57.
Bonella Randy M.
Dodd James M.
Halbert John B.
Williams Michael W.
Intel Corporation
Marger & Johnson & McCollom, P.C.
Tran M.
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