Mask for electron beam exposure, manufacturing method for...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S296000

Reexamination Certificate

active

06376132

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to, in a technology for exposing electron beams (EB-exposure) onto a semiconductor wafer, a mask for electron beam exposure in which the proximity effect correction method is improved, a manufacturing method for the same, and a manufacturing method for a semiconductor device using the same, and in particular to a mask for electron beam exposure being preferable as a stencil mask for a projection exposure apparatus in which the entirety or a part of a pattern corresponding to one chip is formed, a manufacturing method for the same, and a manufacturing method for a semiconductor device using the same.
2. Description of the Related Art
FIG. 1
is a drawing showing an electron optics of EB projection exposure apparatus. In this EB projection exposure apparatus, stencil mask
21
with openings formed at portions for transmitting electron beams, projection lens
22
, limiting aperture
23
, and object lens
24
are disposed in parallel to each other so that their center axes are matched with each other, and under the object lens
24
, wafer
25
is disposed.
On the surface of the wafer
25
, resist film
26
is formed, and onto the resist film
26
, electron beams transmitted through the openings in the stencil mask
21
are converged by the projection lens
22
, narrowed by the limiting aperture
23
, and further converged by the object lens
24
, and then irradiated. In the stencil mask
21
, a pattern or a part of the pattern corresponding to one chip is formed, and by scanning electron beams onto the stencil mask
21
, a pattern corresponding to one chip is exposed on the resist film
26
on the wafer
25
.
Thus, in the EB-exposure technology, a pattern is written onto a resist film formed on a mask material by electron beams, developed, and etched to form a mask for electron beam exposure (mask-writing), and furthermore, by using this mask for electron beam exposure, electron beams are exposed to transfer the mask pattern onto the resist film on the wafer (wafer-writing). These cases have a problem whereby, due to a so-called proximity effect, the pattern line width deviates from the designed width, and therefore, mask-writing and wafer-writing are carried out by a pattern in which such a dimensional change due to the proximity effect is corrected.
That is, the proximity effect is a dimensional change caused by unevenness in pattern density, which is a phenomenon, wherein, in a case where a pattern as a target to be formed on a wafer has lines with fixed widths aligned at fixed spaces, if a negative type resist is used, the widths of the lines at both sides of the pattern become smaller than that of the normal portion at the pattern center section. This dimensional change due to the proximity effect occurs when electron beams which are transmitted through the resist film and enter inside the Si substrate are made incident again onto the resist film due to backscattering. Therefore, the sections of the resist film and Si substrate are cut into meshes. Energy deposited in the resist film due to irradiation of electron beams is calculated by a computer for each mesh. The energy distribution due to the proximity effect is simulated using an exposure intensity distribution (EID) function and is determined. By this EID function, as shown in
FIG. 2
, the proximity effect correction exposure dose for wafer-writing is pre-determined in accordance with the distances from the pattern end portions. By using the determined amounts as mask bias amounts, pattern dimensions of the mask for electron beam exposure are determined. The mask bias amounts make up for the decreased amounts of the line widths due to the proximity effect by increasing the exposure dose at the pattern end portions at which the line widths become smaller, whereby the decreased amounts of the resist dimensions at the pattern end portions are estimated, and the estimated amounts are added to the designed widths as bias amounts for correction.
Also, the distribution of the energy deposition due to forward scattering electrons which have directly entered from the outside into the resist film and backscattering electrons which re-enter into the resist film after scattering inside the Si substrate is as shown in
FIG. 3
, and this deposited energy distribution is expressed by the exposure intensity distribution (EID) function shown by the following Formula 1.
f(r)=k{exp(−r
2
/&bgr;f
2
)+&eegr;(&bgr;f
2
/&bgr;b
2
)exp(−r
2
/&bgr;b
2
)}  (1)
In the above formula, r is the distance from the irradiating point, &bgr;f is the range of the deposited energy distribution due to forward scattering as shown in
FIG. 3
, &bgr;b is the range of the deposited energy distribution due to backscattering, and &eegr; is called a reflection coefficient which is a constant determined depending on the substrate material.
Thus, in order to correct the dimensional change due to the proximity effect, in the prior-art, the mask bias (the correction dose of the mask pattern) is determined by a numerical operation using the EID function and meshes, and the mask in which this mask bias is taken into consideration is used to expose electron beams onto a wafer. Likewise, when manufacturing a mask for electron beam exposure, in order to correct the proximity effect due to electron beams, a numerical operation is carried out, and based on an obtained correction exposure dose, electron beams are exposed onto the resist film on the mask material, whereby a mask is manufactured. Therefore, in the prior-art, the operation is carried out twice when manufacturing a mask and wafer-writing to correct the proximity effect.
However, since the correcting operations are performed for each of the divided meshes, complicated calculation processing is required, and therefore, correcting accuracy is low. In order to increase the correcting accuracy, the mesh size may be made smaller, however, if so, the time required for calculation becomes significantly longer, the processing takes considerable time, and throughput is lowered.
Therefore, a proximity effect correcting method has been proposed for the purpose of omitting the proximity effect correction exposure process for each wafer, and forming a high density pattern at high throughput (Japanese Laid-Open Patent Publication No. Hei-10-90878). In this proximity effect correction method, a mask substrate applied with a resist is prepared, a mask pattern is written onto the substrate resist film by means of EB-exposure, and by using a proximity effect correction mask separately prepared, correcting exposure of the pattern transferring mask is carried out. At this time, the pattern and exposure dose of the correcting mask are determined so that the pattern formed on the mask is additionally corrected (excessively corrected) for the proximity effect which will occur when EB-exposure onto a wafer later, and then, the pattern is developed and etched, whereby a pattern transferring mask whose proximity effect has already been corrected is obtained, and by using this mask, EB are exposed onto the wafer by means of transferring and exposing once. Thereby, two exposure processes including correcting exposure onto each wafer are required for exposure onto the wafer in the prior-art, however, correcting exposure is carried out during manufacturing a mask, whereby a mask whose proximity effect has already been corrected is manufactured, and by omitting the correcting exposure process for wafer-exposure, wafer-writing can be completed by the exposure process once to improve throughput.
However, also in this prior-art, as in the previous case of the prior-art, correction of the proximity effect due to electron beams when mask-writing and correction of the proximity effect due to electron beams when wafer-writing are required, and therefore, the correcting processing takes considerable time for calculation, and also, the problem of low calculation accuracy still remains.
SUMMARY OF THE INVENTION
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