Device for the regeneration of a clock signal

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Regenerating or restoring rectangular or pulse waveform

Reexamination Certificate

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Details

C327S166000

Reexamination Certificate

active

06362671

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of electronics, and, more particularly, to a device for the regeneration of a clock signal. The device may be used for exchanging data via a universal serial bus (USB).
BACKGROUND OF THE INVENTION
According to a USB (user serial bus), the USB clock signal is not transmitted on the bus. Only some synchronization bits are sent at the beginning of transmission so that the devices connected to this bus can get synchronized for sending or receiving data on this bus.
In systems using a data transmission protocol of this kind, the integrated circuits usually and quite conventionally comprise a circuit for the generation of a synchronous clock signal based on a phase-locked loop and a quartz crystal.
SUMMARY OF THE INVENTION
The invention is concerned with a system comprising smart-card type portable carriers. Portable carriers of this kind cannot incorporate a prior art synchronized clock signal generation circuit because it is not possible to integrate either the quartz or the phase-locked loop therein, as these elements take up a great deal of space. The invention therefore relates to a device for the regeneration of the clock signal of the bus from a few external synchronization pulses, e.g., from at least two of them.
In the example of a USB serial bus, the regeneration of a USB clock signal must have high precision. The precision must be to within about 1%. According to the invention, to measure the clock signal period of the bus, a ring oscillator is used. This ring oscillator gives n phases of a clock signal. The invention uses one phase among these n phases as a reference clock signal applied to a counter. This is done to count the number of entire reference clock signal periods between two pulses of the bus. The state of the n phases is read to obtain the current phase whose leading edge coincides with the second pulse of the bus.
This corresponds to the measurement of the delay between the reference clock signal and the second pulse of the bus. Through these two measurements, it is possible to regenerate the clock signal of the bus by the application of these two measurements to a regeneration stage comprising a ring oscillator and counting means identical to those used for the acquisition.
A device for the regeneration of the clock signal of the bus according to the invention thus comprises an acquisition stage and a regeneration stage, each comprising a ring oscillator and counting means. The acquisition stage is used to measure the number of entire reference clock periods between two successive pulses of the serial bus and the current phase of the reference clock signal on the second pulse. The regeneration stage uses the measurements of the acquisition stage to generate a pulse at output by a ring oscillator and identical counting means.
The invention therefore relates to a device for the regeneration of the clock signal of an external serial bus in an integrated circuit, comprising a stage for the acquisition of the period of the clock signal of the bus comprising a ring oscillator, counting means and means for the reading of a current phase. The ring oscillator provides at an output n phases of a clock signal.
A phase is applied as a reference clock signal to the counting means to count the number of entire reference clock signal periods between a first pulse and a second pulse of the bus. The means for the reading of the current phase is activated by the second pulse. The current phase corresponds to the measurement of the phase delay between the reference clock signal and this second pulse.
The regeneration device furthermore comprises a regeneration stage comprising a ring oscillator and counting means identical to those of the acquisition stage for reproducing the number of pulses counted and the current acquisition phase, and to control a pulse generator giving a regenerated clock signal at an output.


REFERENCES:
patent: 5282223 (1994-01-01), Muramatsu
patent: 5420546 (1995-05-01), Watanabe et al.
patent: 5887028 (1999-03-01), Araki
patent: 5889436 (1999-03-01), Yeung et al.
patent: 5920211 (1999-07-01), Anderson et al.
patent: 5970110 (1999-10-01), Li
patent: 6233205 (2001-05-01), Wells et al.
patent: 6285261 (2001-09-01), Pax et al.

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