Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2000-08-16
2002-04-09
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S548000
Reexamination Certificate
active
06369587
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89104922, filed Mar. 17, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a detection circuit. More particularly, the present invention relates to a pulse center detection circuit, in which the pulse center can be exactly detected and can be broadly used for a circuit design.
2. Description of the Related Art
In general circuits, the conventional method for detecting a periodic pulse center is frequency divided by a higher pulse that has a frequency many times higher than the periodic pulse. Therefore, detecting the frequency divided pulse center by the higher pulse. According to the conventional method, a pulse that has a higher frequency is required, however, it easily generates a high frequency noise. Thus, detecting the pulse center is impossible when a detected pulse center is a pulse with a highest frequency in a system.
SUMMARY OF THE INVENTION
The invention provides a pulse center detection circuit, which comprises a switch control signal generator, a comparator, a first controlled current source, a second controlled current source, a third controlled current source, a fourth controlled current source, a first capacitor, a second capacitor, a first switch and a second switch. The switch control signal generator receives a detected pulse and generates a first switch control signal, a second switch control signal, a third switch control signal, a fourth switch control signal, a fifth switch control signal and a sixth switch control signal according to the detected pulse. Thus, the first switch control signal and the fourth switch control signal are complementary to each other, and the second switch control signal and the third switch control signal are complementary to each other. The comparator outputs a pulse center signal according to input signals imported through its positive input terminal and negative input terminal. The first controlled current source has an input terminal connected to a voltage source and an output terminal connected to the negative input terminal of the comparator. Hence, a switch state of the first controlled current source is controlled by the first switch control signal. The second controlled current source has an input terminal connected to the negative input terminal of the comparator and an output terminal connected to a ground voltage. Thus, a switch state of the second controlled current source is controlled by the second switch control signal. The third controlled current source has an input terminal connected to the voltage source and an output terminal connected to the positive input terminal of the comparator. A switch state of the third controlled current source is controlled by the third switch control signal. The fourth controlled current source has an input terminal connected to the positive input terminal of the comparator and an output terminal connected to the ground voltage. A switch state of the fourth controlled current source is controlled by the fourth switch control signal. The first capacitor is connected from the negative input terminal of the comparator to the ground voltage. The second capacitor is connected from the positive input terminal of the comparator to the ground voltage. The first switch is connected from the negative input terminal of the comparator to a reset capacitor voltage source. A switch state of the first switch is controlled by the fifth switch control signal. Moreover, the second switch is connected from the positive input terminal of the comparator to the reset capacitor voltage source. A switch state of the second switch is controlled by the sixth switch control signal., When the switch control signal generator receives the detected pulse and the detected pulse increases, the switch control signal generator generates a half cycle of the second switch control signal, the fifth switch control signal, the fourth switch control signal and the sixth switch control signal at a high level in alternation during a rise-and-fall edge of each half cycle of the detected pulse.
According to the pulse center detection circuit of the invention, when the second controlled current source and the third controlled current source are turned on, the first controlled current source, the fourth controlled current source, and the first switch and the second switch are turned off, the first capacitor is discharged and the second capacitor is charged.
According to the pulse center detection circuit of the invention, when the second controlled current source and the third controlled current source are turned off, the first switch is turned on, then the positive input terminal of the comparator maintainsthe charged voltage and its negative input terminal is connected to the reset capacitor voltage source to reset.
According to the pulse center detection circuit of the invention, when the first switch is turned off, and the first controlled current source and the fourth controlled current source are turned on, then the first capacitor is charged and the second capacitor is discharged.
According to the pulse center detection circuit of the invention, when the first controlled current source and the fourth controlled current source is turned off, the second switch is turned on, then negative input terminal of the comparator maintainsthe charged voltage and its positive input terminal is connected to the reset capacitor voltage source to reset.
The pulse center detection circuit of the invention utilizes the characteristics of the comparator combined with its positive input terminal and negative input terminal that are in the charging and discharging process. Therefore, when an input signal imported through the positive input terminal of the comparator is larger than an input signal imported through the negative input terminal of the comparator, the comparator outputs a high pulse center signal. Inversely, when an input signal imported through the positive input terminal of the comparator is smaller than an input signal imported through the negative input terminal of the comparator, the comparator outputs a low pulse center signal. Thus, the comparator can output the detected pulse center accurately via the above-described process of charging and discharging.
The pulse center detection circuit of the invention utilizes an analog differential circuit so that a flip of a noise-generated pulse center can be significantly decreased and the pulse center can be precisely detected. In addition, the high-frequency noise can be prevented and a pulse center can be detected without using a higher frequency signal. Furthermore, the invention can be broadly used for a circuit design such as a monitor circuit design to detect a flyback pulse center and also can be used for a general periodic pulse which requires detection of its pulse center.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5659254 (1997-08-01), Matsumoto et al.
Liu Don.
Tu Jason
Kerveros James
Metjahic Safet
Novatek Microelectronics Corp.
Patents J. C.
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