Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
1999-12-30
2002-03-26
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S528000
Reexamination Certificate
active
06362523
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device having a semiconductor chip. More particularly, this invention relates to a semiconductor device having a semiconductor circuit on one surface of a semiconductor chip.
BACKGROUND OF THE INVENTION
FIG. 5
is a perspective view showing a rough configuration of a conventional semiconductor device.
FIGS. 6A and 6B
are plan views showing rough configurations on the front surface and the rear surface of a semiconductor chip in the conventional semiconductor device. The conventional semiconductor device comprises a semiconductor chip
1
, semiconductor circuits
2
on one surface (to be referred to as a front surface hereinafter)
3
of the semiconductor chip
1
, and electrode terminals (to be referred to as pads hereinafter)
5
connected to the semiconductor circuits
2
.
A metal film is entirely deposited on a semiconductor chip rear surface
4
opposing the semiconductor chip front surface
3
on which the semiconductor circuits
2
are formed to the affinity between a silicon substrate itself or the semiconductor chip
1
(in molding) and a not illustrated frame serving as a base.
However, according to the conventional technique, the semiconductor circuits
2
are formed on the semiconductor chip front surface
3
, and the semiconductor chip rear surface
4
on which the semiconductor circuits
2
are not formed is a silicon substrate itself or is entirely covered with a metal film. Therefore, a problem that the semiconductor chip rear surface
4
is not effectively used at all is posed.
When a capacitor element or a coil element which requires a relatively large area is arranged on the semiconductor chip
1
, since the area of the semiconductor chip
1
must be increased, costs disadvantageously increase. Since a capacitor element having a large capacitance or a coil element having a large reactance requires a larger area, these elements cannot be arranged on the semiconductor chip
1
, and desired performance cannot be obtained, disadvantageously. Since a large number of parts which are not incorporated in the semiconductor device are present on a printed circuit board outside the semiconductor device, the printed circuit board cannot be reduced in size.
SUMMARY OF THE INVENTION
The present invention has been made in light of the problems described above. It is the first object of the present invention to obtain a semiconductor device which can effectively use the rear surface of the semiconductor chip on which a semiconductor circuit is not formed.
It is the second object of the present invention to obtain a semiconductor device which can reduce the area of a semiconductor chip to reduce costs, or a semiconductor device in which a capacitor element having a large capacitance and a coil element having a reactance can be arranged to achieve desired performance.
It is the third object of the present invention to obtain a semiconductor device which effectively uses the rear surface of the semiconductor chip on which the semiconductor circuit is not formed, incorporates parts on a printed circuit board outside the semiconductor device in the semiconductor device, and can reduce the printed circuit board in size.
According to a first aspect of the present invention, circuit elements such as capacitors, resistors, and coils and pads connected to these circuit elements are formed by chemical vapor deposition (CVD), sputtering, electrolyte plating, or the like on the rear surface of the semiconductor chip on which a semiconductor circuit is not formed.
Further, a coil element having a relatively large area is arranged on the rear surface of the semiconductor chip. In this manner, even a coil having a large reactance can be arranged.
Further, a capacitor element having a relatively large area can be arranged on the rear surface of the semiconductor chip. In this manner, even a capacitor having a relatively large capacitance can be arranged.
Further, a by-pass capacitor having a capacitance which is larger than that of a capacitor which can be arranged on the front surface of the semiconductor chip can be arranged on the rear surface.
According to a second aspect of the present invention, the metal wiring layer for connecting chip parts is formed on the rear surface of the semiconductor. Therefore, parts formed on a printed circuit board outside the semiconductor device can be incorporated in the semiconductor device.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 5982018 (1999-11-01), Wark et al.
patent: 730311 (1995-01-01), None
patent: 98482 (1997-01-01), None
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Potter Roy
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