Etching a substrate: processes – Forming or treating mask used for its nonetching function
Reexamination Certificate
1999-05-05
2002-03-05
Gulakowski, Randy (Department: 1746)
Etching a substrate: processes
Forming or treating mask used for its nonetching function
C216S087000, C216S096000, C216S100000, C438S510000, C438S514000, C156S345420
Reexamination Certificate
active
06352647
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor device manufacturing. More particularly, the present invention is directed to a simplified method for patterning the membrane area for a membrane-type mask, such as a stencil mask.
BACKGROUND OF THE INVENTION
It is well known that membrane-type masks (e.g., stencil masks) can be used for many different types of purposes. One example of an area of great importance in which membrane-type masks are used is in lithographic systems (e.g., photolithography), which utilize stencil masks to pattern resist coated targets, such as are used in integrated circuit fabrication. These stencil masks typically include a substrate or support structure and a hardmask layer, which is typically a thin membrane which carries a mask pattern.
Integrated circuits are typically fabricated on a wafer of semiconductor material such as silicon or gallium arsenide. During the fabrication process, the wafer is subjected to an ordered series of steps, which may include photomasking, material deposition, oxidation, nitridization, ion implantation, diffusion, etching, and others, in order to achieve a final product.
A variety of techniques are known for making membrane masks. For example, U.S. Pat. No. 5,766,829 discloses a method in which a baseplate
40
(which can be formed of a material such as single crystal silicon, or amorphous silicon deposited on a glass substrate) contains circuitry and electrical devices which control the operation of a field emission display. For etching field emitter sites
38
(
FIG. 3C
) for the baseplate
40
, a mask layer
42
is deposited on the baseplate
40
. A layer of positive tone photoresist
44
is deposited on the mask layer
42
, The photoresist
44
is then exposed and developed. Next, the photoresist
44
is used to etch the mask layer
42
to form a hard mask
46
. Following formation of the hard mask
46
, the photoresist
44
is stripped. Next, the baseplate
40
is etched using the hard mask
46
to form pointed emitter sites
38
. Following formation of the emitter sites
38
the hard mask
46
is stripped using an etchant that is selective to the baseplate
40
.
The manufacture of such prior art masks requires a high degree of precision, and such steps are typically carried out many times. There accordingly has been a need for a method for manufacturing such masks which reduces and/or simplifies the number of required processing steps.
SUMMARY OF THE INVENTION
The present invention provides a method of making an etched assembly, comprising
providing an annular seal member between a first surface of a first assembly and a first clamp element, the first assembly comprising at least a first layer, a second layer and a third layer;
applying a force between the first clamp element and a second clamp element to hold the first assembly between the annular seal member and the first clamp element; and
etching the first surface of the first assembly within the bounds of an interior space defined by the annular seal member.
In a preferred aspect, the present invention provides a method of making a hardmask etched assembly, comprising:
providing an annular seal member between a first surface of a hardmask assembly and a first clamp element, the hardmask assembly comprising at least a hardmask layer; and
applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element.
The hardmask assembly preferably further comprises a substrate layer and a membrane layer. In a preferred aspect of the invention, the hardmask assembly is preferably provided by doping a first section of a substrate to form a membrane layer in a first section of said substrate, and applying a hardmask material to the substrate layer to form a hardmask layer on the substrate layer.
The method preferably further comprises any of the following:
etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member;
etching a mask pattern in the membrane layer;
etching the substrate layer through the hardmask layer; and
removing the hardmask layer after etching the membrane layer.
In addition, the present invention provides articles made in such processes, for example, articles comprising a membrane layer having a pattern formed therein, a substrate layer and a hardmask layer, the hardmask layer having a hardmask pattern formed therein.
The present invention is further directed to integrated circuits which incorporate one or more components made using any of the articles according to the present invention, e.g., the membrane masks of the present invention can be used in processing such components. In addition, the present invention is directed to structures used in making articles according to the present invention, as described herein.
The invention may be more fully understood with reference to the accompanying drawings and the following description of the embodiments shown in those drawings. The invention is not limited to the exemplary embodiments and should be recognized as contemplating all modifications within the skill of an ordinary artisan.
REFERENCES:
patent: 4966663 (1990-10-01), Mauger
patent: 5302238 (1994-04-01), Roe et al.
patent: 5674785 (1997-10-01), Akram et al.
patent: 5694685 (1997-12-01), Millas
patent: 5766829 (1998-06-01), Cathey, Jr. et al.
patent: 5861328 (1999-01-01), Tehrani et al.
patent: 5872044 (1999-02-01), Hemmenway et al.
patent: DL142934 (1980-07-01), None
Dickstein , Shapiro, Morin & Oshinsky, LLP
Gulakowski Randy
Kornakov M.
Micro)n Technology, Inc.
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