Balanced input for temperature sensor

Amplifiers – With semiconductor amplifying device – Including balanced to unbalanced circuits and vice versa

Reexamination Certificate

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Details

C330S069000, C330S252000, C330S256000

Reexamination Certificate

active

06335661

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to electronic circuits, and more particularly the invention relates to analog electronic circuits.
Analog circuits typically operate on linear or analog signals which represent real world phenomena such as temperature, pressure, and sound and are continuously variable over a wide range of values. This is to be distinguished from digital signals which represent the “ones” and “zeros” of binary arithmetic.
In temperature sensor products, for example, a signal proportional to absolute temperature (PTAT) and a signal complimentary to absolute temperature (CTAT) are obtained and manipulated. The PTAT signal, voltage or current, is generally developed by applying the voltage difference of two bipolar junctions (transistors or diodes) running at different current density across a resistor. The current through the bipolar junctions should be constant or exponential in temperature. The CTAT signal, voltage or current, is developed by applying the voltage from a single bipolar junction (transistor or diode) across a resistor.
For a temperature sensor product, one wants to take a PTAT signal and subtract the CTAT signal. The difference is then multiplied by a scaling factor. To accomplish the multiplication, an operational amplifier with a feedback ratio network is employed. The ratioed feedback signal from the operational amplified is subtracted from the input signal.
The present invention is directed to a circuit which allows the subtraction of the CTAT signal (V
be
) from the PTAT signal, and then subtraction of a second signal or feedback from an operational amplifier.
SUMMARY OF THE INVENTION
In accordance with the invention, two current paths are provided with matched current sources. According to one embodiment, in one current path for the positive input, a first PNP bipolar transistor (or equivalent MOS transistor) is serially connected emitter to collector through a first base-emitter junction of an NPN transistor to a circuit ground. The base of the first PNP transistor receives a plus input (IN+). The NPN device is diode connected (base to collector).
In the other current path, for the negative input, a second base-emitter junction of an NPN transistor is serially connected through the emitter-collector of a second PNP bipolar transistor (or equivalent MOS transistor) to circuit ground. The base of the second PNP transistor receives a minus input (IN−). The NPN is diode connected. Outputs are taken at the emitter of the first PNP transistor (OUT+) and at the base of the second base-emitter junction (OUT−). The two outputs arc combined to yield IN+−(IN−)−V
be
.
The invention and objects and features thereof will be more readily apparent from the following detailed description and dependent claims when taken with the drawings.


REFERENCES:
patent: 4475103 (1984-10-01), Brokaw et al.
patent: 5030924 (1991-07-01), Fritz
patent: 5138318 (1992-08-01), Matsuzawa
patent: 5374897 (1994-12-01), Moraveji
patent: 5805011 (1998-09-01), Comino
patent: 6121838 (2000-09-01), Freeman et al.

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