Data processor

Boots – shoes – and leggings

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Details

364DIG1, 3642328, 3642329, 3642457, 3642458, 3642469, G06F 900, G06F 1214

Patent

active

053054601

ABSTRACT:
In a microcomputer having two program execution states including a supervisor state and a user state, there is disposed a flag or a register having such a flag indicating whether or not a RAM area used in the supervisor state can be used in the user state by the CPU. A judge circuit determines whether or not the CPU has made an attempt to invalidly access the RAM in the user state based on the content of the flag or the register and that of the supervisor/user state specify bit in the status register. In a case of an occurrence of an access violation, a violation signal is sent to the CPU and the selection signal of the RAM is disabled (to be set to an ineffective state), thereby increasing the reliability of the system.

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"Protection Scheme for Non-Key Storage Systems", IBM Technical Disclosure Bulletin, vol. 28, No. 10, Mar. 1986, pp. 4538-4539.

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