Slave microprocessor for operation with a master microprocessor

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G06F 1516, G06F 1300

Patent

active

040992365

ABSTRACT:
An integrated circuit, slave microprocessor with its bus protocol is described. The slave unit may be activated by either a master microprocessor or a DMA controller. When activated by the DMA controller, handshaking signals between the controller and slave microprocessor permit the transfer of data between these units without intervention by the master microprocessor. Unique flags permit the master processor to readily determine the status of the slave microprocessor.

REFERENCES:
patent: 3510844 (1970-05-01), Aranyi
patent: 3766526 (1973-10-01), Buchanan
patent: 3909799 (1975-04-01), Recks
patent: 4006466 (1977-02-01), Patterson

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