Circuit for suppressing noise influences in the evaluation of si

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179 1P, 179 18FA, H04M 322

Patent

active

042975310

ABSTRACT:
A circuit arrangement is provided for suppressing periodic or non-periodic noise voltage components which are superimposed as an undesirable influence on the DC voltage signal to be evaluated on DC fed, two-conductor transmission lines, particularly for extension circuits in telephone systems which are fed in the subscriber circuit of the exchange location via symmetrical branches and evaluated with respect to the subscriber's loop state changes. By coupling to suitable circuit points of the subscriber circuit, the superimposed noise signal is separated by a differential amplifier and fed to a second differential amplifier. The original loop signals, superimposed with noise, is also fed to an input of the second differential amplifier so that a noise-free useful signal indicating the operational state arises at the output of the second differential amplifier.

REFERENCES:
patent: 3202928 (1965-08-01), Prior
patent: 3611145 (1971-10-01), O'Connor
patent: 3622709 (1971-11-01), Tjaden
patent: 3808377 (1974-04-01), Young
patent: 4087646 (1978-05-01), Brolin et al.
patent: 4103112 (1978-07-01), Korsky
patent: 4110569 (1978-08-01), Schindler et al.

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