Error location apparatus and methods

Communications: electrical – Digital comparator systems

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

3401461AV, G06F 1112

Patent

active

040991601

ABSTRACT:
Location of multiple symbols in error is enhanced by using affine polynomial-based apparatus and methods. An algebraic trace function 0 (vector) provides a test for whether or not the location polynomial has roots in the field of interest. The selected roots then combine with previously calculated error-indicating syndromes to indicate symbols in error. Informational states developed for error location are employed to generate error patterns. Preferred apparatus includes a sequenced and buffered special purpose finite field processor, either of the random logic, array

REFERENCES:
patent: 3278729 (1966-10-01), Chien
patent: 3533067 (1970-10-01), Zierler et al.
patent: 3648236 (1972-03-01), Burton
patent: 3781791 (1973-12-01), Sullivan
patent: 3958220 (1976-05-01), Marshall
patent: 3983536 (1976-09-01), Telfer

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Error location apparatus and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error location apparatus and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error location apparatus and methods will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-280495

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.