EEPROM system with bit error detecting function

Details EEPROM system with bit error detecting function EEPROM system with bit error detecting function

1988-09-16

1990-10-30

Atkinson, Charles E.

Excavating

371 6, 371 214, G06F 1110

Patent

active

049674153

ABSTRACT:
An EEPROM system with an error detecting function includes: a memory cell matrix composed of a plurality of MOS memory cells and a plurality of bit lines connected separately to the plurality of MOS memory cells; and a plurality of intermediate state detecting circuits connected separately to the plurality of bit lines for detecting an intermediate state other than writing and erasing states of the MOS memory cells, and for outputting an error bit indicating signal, the intermediate state being a threshold voltage between a threshold voltage of a storage MOS memory cell in a writing state included in each of the MOS memory cells and a threshold voltage of the storage MOS memory cell in an erasing state.

REFERENCES:
patent: 4016409 (1977-04-01), Kim
patent: 4375099 (1983-02-01), Waters et al.
patent: 4456992 (1984-06-01), Schaub
patent: 4809278 (1989-02-01), Kim et al.
"Error Detecting and Correction Techniques for National Semiconductor's EEPROM Products", National Semiconductor Corp. Application Note 482, Non-Volatile Memory Databook '87, p2-84 88.

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