Microcomputer building block

Boots – shoes – and leggings

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3642328, 3642291, 36424294, G06F 1516

Patent

active

049673262

ABSTRACT:
Single chip microcomputers with program stored in on-chip RAM combined by non-shared communication links each having an input channel and an output channel, each channel having a data register and process register used for synchronizing processes executed in different microcomputers in an array. Each process on a chip has a workspace. Constant bit size instructions have function and data portions. Scheduling/descheduling of processes in each microcomputer occur by forming a linked list in the workspaces for active processs. Each workspace identifies the next process to be executed and the next instructon for its own process.

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