Programmable finite impulse response processor with scalable dyn

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

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G06F 1710

Patent

active

061637882

ABSTRACT:
A programmable finite impulse response processor, by which a convolution calculation between input data and filter coefficients is performed based on Booth algorithm. The processor include a pre-processing unit, data latches, a configurable connection unit, Booth decoders, coefficient registers, a path control unit, and a post-processing unit. The pre-processing unit is used to partition the input data into a pipeline sequence which include a plurality of sequence units in a Booth format. According to both the dynamic ranges of the input data and of the filter coefficients, the configurable connection unit is used to select certain parts of the sequence units for the convolution calculation, so that a dynamic data range is scaleable by the processor. By Booth decoders, the selected sequence units are decoded and multiplied by corresponding filter coefficients stored in the coefficient registers. By the path control unit, the bit lengths of the filter coefficients are scaled and accumulation pathes are selected. The post-processing unit is to perform a final accumulation of the convolution calculation results between the selected sequence units and the filter coefficients.

REFERENCES:
patent: 5193070 (1993-03-01), Abiko et al.
patent: 5333119 (1994-07-01), Raatz et al.
patent: 5777914 (1998-07-01), Larsson et al.
patent: 6009448 (1999-12-01), Jong et al.

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