Nonvolatile memory device

Details Nonvolatile memory device Nonvolatile memory device

1997-08-07

1998-09-01

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518521, 36518529, 36518533, 365218, G11C 1134

Patent

active

058019936

ABSTRACT:
A nonvolatile memory device includes a plurality of program/select lines arranged in a row direction spaced apart from each other in first prescribed intervals, a plurality of bit lines arranged in a column direction spaced apart from each other in second prescribed intervals at a substantially right angle to the plurality of the program/select lines to form a matrix of a plurality of square areas, and a plurality of control lines disposed in the column direction and adjacent to the bit lines in a one-to-one correspondence. Each cell is disposed in one of the square areas, and has a source, a drain, and a channel region. Further, a select/program gate of each cell allows the selection of the cell for programming and conducting the programming by means of charge carriers. A floating gate stores the charge carriers by means of tunneling through the channel region during erasure and provides the stored charge carriers to the program/select gate through the tunneling diode during programming. A control gate controls an amount of the charge carriers provided from the floating gate to the program/select gate. The program/select gates in the cells disposed in the same row are commonly connected to one of the program/select lines, and the control gates in the cells disposed in the same column are commonly connected to one of the control lines. The sources (or drains) in the cells disposed in the same row are commonly connected to one of the bit lines, together with the drains (or sources) of the cells disposed in an adjacent row.

REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5422842 (1995-06-01), Cernea et al.
patent: 5566111 (1996-10-01), Choi

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