Non-volatile memory cells, memory arrays including the same...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185050, C365S185270, C365S185290

Reexamination Certificate

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07315474

ABSTRACT:
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a small hole-tunneling-barrier height; a charge storage layer disposed above the tunnel dielectric structure; an insulating layer disposed above the charge storage layer; and a gate electrode disposed above the insulating layer are described along with arrays thereof and methods of operation.

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