MOS buffer circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307205, 307251, 307DIG1, 307DIG4, H03K 1940, H03K 1704

Patent

active

040485188

ABSTRACT:
An MOS buffer circuit particularly suitable as an input stage for receiving a lower level input signal in an MOS integrated circuit. A transistor is employed to decouple an input transistor from a load, thereby allowing an output signal from the circuit to rise more quickly.

REFERENCES:
patent: 3518451 (1970-06-01), Booher
patent: 3601627 (1970-07-01), Booher
patent: 3676700 (1972-07-01), Buchanan
patent: 3697777 (1972-10-01), Donoghue
patent: 3702945 (1972-11-01), Faith et al.
patent: 3708688 (1973-01-01), Yao
patent: 3710271 (1973-01-01), Putman
patent: 3794856 (1974-02-01), Baker

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