Non-volatile semiconductor storage device and memory system

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S185200

Reexamination Certificate

active

07916548

ABSTRACT:
A non-volatile semiconductor storage device includes: a memory cell array including memory strings, each of the memory strings having: a first end; a second end; and a plurality of memory cells connected in series between the first end and the second end, the memory cells being categorized into memory cell groups; a first end that is one end of the memory string; and a second end that is the other end of the memory string; first selection transistors connected to the respective first ends of the memory strings; a plurality of second selection transistors connected to the respective second ends of the memory strings; bit lines connected to the respective second selection transistors; word lines connected to the memory cells; and a control circuit configured to apply different control voltages to the respective word lines.

REFERENCES:
patent: 6327183 (2001-12-01), Pawletko et al.
patent: 7272050 (2007-09-01), Han et al.
patent: 7388790 (2008-06-01), Maejima et al.
patent: 2007/0279981 (2007-12-01), Abe et al.
patent: 2008/0089135 (2008-04-01), Ito
patent: 2009/0196083 (2009-08-01), Norman
patent: 2009/0196102 (2009-08-01), Kim
patent: 2005-235260 (2005-09-01), None
patent: 2006-54036 (2006-02-01), None
U.S. Appl. No. 12/499,237, filed Jul. 8, 2009, Futatsuyama.

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