Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2011-08-23
2011-08-23
Eisen, Alexander (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000
Reexamination Certificate
active
08004487
ABSTRACT:
The present invention is intended to reduce a peak value of a momentary current, which is generated in a data driver, even when display data items expressing a succeeding display line have changed largely. The data driver includes: an internal control signal production circuit that groups multiple video lines into multiple blocks and produces internal control signals which are used to make the transmission timings of video voltages onto video lines, which belong to the blocks, different from one another among the blocks; a first latch circuit that sequentially latches display data items which express one display line a second latch circuit that latches the display data items which have been latched into the first latch circuit; and a third latch circuit that latches the display data items, which have been latched into the second latch circuit and are associated with the blocks, at timings, responsively to internal control signals.
REFERENCES:
patent: 7239300 (2007-07-01), Shimizu
patent: 7821487 (2010-10-01), Tanaka et al.
patent: 2004/0189579 (2004-09-01), Shimizu
patent: 2007/0152947 (2007-07-01), Tanaka et al.
patent: 2004-301946 (2003-03-01), None
A. Marquez, Esq. Juan Carlos
Eisen Alexander
Hitachi Displays Ltd.
Marinelli Patrick F
Stites & Harbison PLLC
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