Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-04-08
2008-04-08
Pham, Ly Duy (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S185270
Reexamination Certificate
active
07355893
ABSTRACT:
The semiconductor memory device comprising: an n-channel memory cell transistor including: a first diffused region and a second diffused region formed in a semiconductor substrate; a charge storage layer formed over the semiconductor substrate between the first diffused region and the second diffused region; and a gate electrode formed over the charge storage layer; a power supply circuit formed on the semiconductor substrate, the power supply circuit being connectable to the first diffused region, pumping a voltage supplied from an outside power supply and outputting the pumped voltage; and writing means which, upon writing to the n-channel memory cell transistor, applies a reference voltage to the second diffused region, and applies a negative voltage with respective to the reference voltage supplied from the power supply circuit to the first diffused region to thereby flow current between the first diffused region and the second diffused region and to store charges in the charge storage layer.
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Fujitsu Limited
Pham Ly Duy
Westerman, Hattori, Daniels & Adrian , LLP.
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