Methods and apparatus for testing a link between chips

Details Methods and apparatus for testing a link between chips Methods and apparatus for testing a link between chips

2008-01-29

2008-01-29

Cosimano, Edward R (Department: 2863)

Data processing: measuring, calibrating, or testing

Testing system

Including specific communication means

C073S865900, C324S500000, C324S512000, C324S527000, C324S537000, C324S538000, C324S539000, C324S543000, C702S108000, C702S117000, C714S001000, C714S025000, C714S043000

Reexamination Certificate

active

07324913

ABSTRACT:
In a first aspect, a first method of testing a link between a first chip and a second chip is provided. The first method includes the steps of, while operating in a test mode, (1) transmitting test data of sufficient length to enable exercising of worst case transitions from the first chip to the second chip via the link; and (2) performing cyclic redundancy checking (CRC) on the test data to test the link. Numerous other aspects are provided.

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