Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-07-08
2008-07-08
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185170, C365S185230
Reexamination Certificate
active
07397700
ABSTRACT:
A non-volatile memory electronic device is integrated on a semiconductor and is of the Flash EEPROM type with an architecture of the NAND type including at least one memory matrix organized in rows or word lines and columns or bit lines of memory cells and with at least one associated row decoding circuit portion. Advantageously, the matrix includes at least one logic sector with pairs of rows or word lines being short-circuited with each other and referring to a respective biasing terminal, one for each pair, and in that the row decoding circuit portion includes a single select block which controls a single multiplexer for the logic sector for the regulation of the signals applied to the biasing terminals.
REFERENCES:
patent: 5732018 (1998-03-01), Choi et al.
patent: 2005/0232012 (2005-10-01), Park
patent: 2006/0245233 (2006-11-01), Mikolajick et al.
Pascucci Luigi
Rolandi Paolo
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Elms Richard T.
Jorgenson Lisa K.
Nguyen Dang T
STMicroelectronics S.r.l.
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