Folding chip planar stack package

Details Folding chip planar stack package Folding chip planar stack package

2008-07-08

2008-07-08

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S686000, C257S723000, C257S784000, C257S778000, C257S777000

Reexamination Certificate

active

07397115

ABSTRACT:
A folding chip planar stack package is realized by employing folding chips. The folding chip planar stack package includes a substrate, first and second semiconductor chips attached to an upper surface of the substrate while being folded and spaced in parallel to each other, a bonding wire for electrically connecting the first and second semiconductor chips with the substrate, a sealing material for sealing the upper surface of the substrate including the first and second semiconductor chips and the bonding wire, and solder balls attached to a lower surface of the substrate.

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