Method and apparatus providing shared pixel straight gate...

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C250S208100

Reexamination Certificate

active

07924333

ABSTRACT:
Methods and apparatuses using four-way-shared readout circuits to increase pixel fill factor. Embodiments consolidate circuits from several pixels, reducing the number of components in each pixel and this increasing the fill factor of each pixel. Additionally, embodiments use “straight gate” transfer gates to increase the readout speed and symmetry of the smaller pixels.

REFERENCES:
patent: 5917547 (1999-06-01), Merrill et al.
patent: 6252218 (2001-06-01), Chou
patent: 6486913 (2002-11-01), Afghahi et al.
patent: 6867806 (2005-03-01), Lee et al.
patent: 6933974 (2005-08-01), Lee
patent: 7244918 (2007-07-01), McKee et al.
patent: 7244920 (2007-07-01), Kim et al.
patent: 7443437 (2008-10-01), Altice et al.
patent: 7639298 (2009-12-01), Oita et al.
patent: 2002/0134917 (2002-09-01), Ang
patent: 2004/0016869 (2004-01-01), Campbell et al.
patent: 2004/0069930 (2004-04-01), Zarnowski et al.
patent: 2004/0080643 (2004-04-01), Peng
patent: 2005/0110884 (2005-05-01), Altice et al.
patent: 2005/0128327 (2005-06-01), Bencuya et al.
patent: 2005/0164421 (2005-07-01), Patrick et al.
patent: 2006/0027843 (2006-02-01), Ogura et al.
patent: 2006/0038904 (2006-02-01), Kudoh
patent: 2006/0044439 (2006-03-01), Hiyama et al.
patent: 2006/0077273 (2006-04-01), Lee et al.
patent: 2006/0118837 (2006-06-01), Choi
patent: 2006/0132633 (2006-06-01), Nam et al.
patent: 2006/0146158 (2006-07-01), Toros et al.
patent: 2006/0164533 (2006-07-01), Hsieh et al.
patent: 2006/0170804 (2006-08-01), Kwon
patent: 2006/0208163 (2006-09-01), Manabe et al.
patent: 2006/0231875 (2006-10-01), Patrick et al.
patent: 2006/0256221 (2006-11-01), Mckee et al.
patent: 2006/0273240 (2006-12-01), Guidash et al.
patent: 2006/0284177 (2006-12-01), Hynecek
patent: 2007/0023797 (2007-02-01), Wu et al.
patent: 2007/0023798 (2007-02-01), McKee
patent: 2007/0034884 (2007-02-01), McKee
patent: 2007/0040922 (2007-02-01), McKee et al.
patent: 2007/0045514 (2007-03-01), McKee et al.
patent: 2007/0046796 (2007-03-01), McKee
patent: 2007/0058062 (2007-03-01), Ohta
patent: 2007/0084986 (2007-04-01), Yang et al.
patent: 2007/0153107 (2007-07-01), Boettiger et al.
patent: 2007/0177044 (2007-08-01), Maruyama et al.
patent: 2008/0225148 (2008-09-01), Parks
patent: 2008/0303930 (2008-12-01), Kuroda et al.
patent: 2009/0046189 (2009-02-01), Yin et al.
patent: 2009/0090845 (2009-04-01), Yin et al.
patent: 0 707 417 (1996-04-01), None
patent: 1 026 747 (2000-08-01), None
patent: 1 804 297 (2007-07-01), None
patent: 2003-32556 (2003-01-01), None
patent: 2005-183527 (2005-07-01), None
patent: 2005-318544 (2005-11-01), None
patent: 2006-54276 (2006-02-01), None
patent: 2006-108497 (2006-04-01), None
patent: 10-2004-0092809 (2004-11-01), None
patent: 10-0598015 (2006-06-01), None
patent: 451584 (2001-08-01), None
patent: WO 03/071787 (2003-08-01), None
patent: WO 2006/122068 (2006-11-01), None
patent: WO 2007/024561 (2007-03-01), None
patent: WO 2007/024855 (2007-03-01), None
patent: WO 2007/027728 (2007-03-01), None
Cheng, H. et al., “An ultra-low dark current CMOS image sensor cell using n/sup +/ ring reset”, Nat. Tsing Hua Univ., Hsinchu, Taiwan Electron Device Letters, IEEE, Publication Date: Sep. 2002; vol. 23 , Issue: 9; pp. 538-540, http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1028992&isnumber=22109&punumber=55&k2dockey=1028992@ieeejrns&query=%28+%28+pixel%3Cin%3Eab+%29+%3Cand%3E+%28+layout%3Cin%3Eab+%29+%29&pos=7 (abstract only).
Yasuda, T. et al., “Adaptive-integration-time image sensor with real-time reconstruction function”, Dept. of Electr. Eng., Tokyo Univ. of Sci., Japan Electron Devices, IEEE Transactions, Publication Date: Jan. 2003; vol. 50 , Issue: 1; pp. 111-120, http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=1185171&isnumber=26588&punumber=16&k2dockey=1185171@ieeejrns&query=%28+%28+pixel%3Cin%3Eab+%29+%3Cand%3E+%28+layout%3Cin%3Eab+%29+%29&pos=6 (abstract only).
Bermak, A. et al., “A high fill-factor native logarithmic pixel: Simulation, design and layout optimization”, Sch. of Eng. & Math, Edith Cowan Univ., Joondalup, WA, Australia; Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium, Publication Date: May 28-31, 2000; vol. 5; pp. 293-296 vol. 5, http://ieeexplore.ieee.org/iel5/6910/18623/00857422.pdf?tp=&arnumber857422&isnumber=18623 (abstract only).
Brown, J.J. et al., “An integrated, optically powered, optoelectronic ‘smart’ logic pixel for interconnection and computing applications”, Hughes Res. Labs., Malibu, CA, USA ; Quantum Electronics, IEEE Journal, Publication Date: Feb. 1993 ; vol. 29 , Issue: 2; pp. 715-726, http://ieeexplore.ieee.org/search/srchabstract.isp?arnumber=199324&isnumber=5181&punumber=3&k2dockey=199324@ieeejrns&query=%28+%28+pixel%3Cin%3Eab+%29+%3Cand%3 E+%28+layout%3Cin%3Eab+%29+%29&pos=8 (abstract only).
Iida, Y. et al., “Pixel structure and layout for CMOS active pixel image sensor”, Publication: Proc. SPIE vol. 3301, p. 158-167, Solid State Sensor Arrays: Development and Applications II, Morley M. Blouke; Ed. Publication Date: Apr. 1998 http://www.spie.org/scripts/abstract.pl?bibcode=1998SPIE.3301..1581.
Chow, H. et al., “New Pixel-Shared Design and Split-Path Readout of CMOS Image Sensor Circuits,” Institute of Semiconductor Technology, Change Gung University, Taoyuan, Circuits and Systems, 2002, ISCAS 2002, IEEE International Symposium, vol. 4, pp. IV-49-IV-52, Aug. 7, 2002, http:/ieeexplore.ieee.org/xpls/abs—all.jsp?arnumber=1010385.
Mendis, S. et al., “Progress in CMOS Active Pixel Image Sensors,” Center for Space Microelectronics Technology Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA, Proceedings of the SPIE, vol. 2172, pp. 19-29, May 1994, Charge-Coupled Devices and Solid State Optical Sensors IV, http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/32570/1/94-0315.pdf.
Miyatake, S. et al., “Transversal-Readout Architecture for CMOS Active Pixel Image Sensors,” IEEE Transactions on Electron Devices, vol. 50, No. 1, pp. 121-129, Jan. 2003, http://ieeexplore.ieee.org/xpls/abs—all.jsp?arnumber=1185172.
Kemeny, S. et al., “CMOS Active Pixel Sensor Array with Programmable Multiresolution Readout,” Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA, USA,1995, http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/29882/1/95-0698.pdf.
Kwok, T. et al., “Readout Circuit for CMOS Active Pixel Image Sensor,” Department of Engineering, Cambridge University, UK, Mar. 28, 2002, vol. 38, Issue 7, pp. 317-318, http://ieeexplore.org/xpls/abs—all.jsp?arnumber=995481.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus providing shared pixel straight gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus providing shared pixel straight gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus providing shared pixel straight gate... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2726821

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.