Method of controlling memory system

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185170, C365S185050, C365S230030, C711S165000, C711S170000, C711S171000, C711S173000

Reexamination Certificate

active

07969781

ABSTRACT:
A memory unit includes a plurality of first blocks each having a first block size. Each of the first blocks stores data of a plurality of second blocks each having a second block size which is smaller than the first block size. A control unit writes the data of the second block in the first block. The control unit is configured such that in a case where the second block to be written is a block that is to be written in the same first block as the second block that is already written in the first block, the second block to be written is written in the same first block even if an address of the second block to be written is not consecutive to an address of the second block that is already written in the first block.

REFERENCES:
patent: 6459644 (2002-10-01), Mizushima et al.
patent: 6941411 (2005-09-01), Roohparvar
patent: 7130979 (2006-10-01), Wong
patent: 7139864 (2006-11-01), Bennett et al.
patent: 7350044 (2008-03-01), Keays
patent: 2002/0188805 (2002-12-01), Kottapalli
patent: 2004/0044840 (2004-03-01), Wong
patent: 2005/0172068 (2005-08-01), Sukegawa
patent: 2005/0268026 (2005-12-01), Oshima
patent: 2005-222228 (2005-08-01), None

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