Nonvolatile semiconductor memory device and operation method...

Details Nonvolatile semiconductor memory device and operation method... Nonvolatile semiconductor memory device and operation method...

2011-03-22

2011-03-22

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185240

Reexamination Certificate

active

07911852

ABSTRACT:
A p-type well region is formed at a main surface of a semiconductor substrate. An n-type impurity region is located under the p-type well region. A first insulating layer is formed on the main surface of the semiconductor substrate and on the p-type well region. A charge-storage insulating layer is formed on the first insulating layer. A gate electrode layer is formed on the charge-storage insulating layer. An erase operation is performed by applying a forward bias to the p-type well region and the n-type impurity region to generate hot carriers and inject the hot carriers into the charge-storage insulating layer.

REFERENCES:
patent: 2004/0214379 (2004-10-01), Lee et al.
patent: 2005/0006698 (2005-01-01), Matsuzaki et al.
patent: 2006/0033146 (2006-02-01), Wang
patent: 2006/0186462 (2006-08-01), Han et al.
patent: 09-036265 (1997-02-01), None
patent: 2005-011490 (2005-01-01), None
patent: 2005-197531 (2005-07-01), None
patent: 2006-237604 (2006-09-01), None
Lee, Chang-Hyun et al., “Charge Trapping Memory Cell of TANOS (Si-Oxide-SiN-Al2O3-TaN) Structure Compatible to Conventional NAND Flash Memory,” IEEE Nonvolatile Semiconductor Memory Workshop 2006, pp. 54-55.
Lee, Chang-Hyun et al. “A Novel SONOS Structure of SiO2/SiN/Al2O3with TaN Metal Gate for Multi-Giga Bit Flash Memories,” IEDM 2003 Tech. Digest, pp. 613-616, Dec. 2003.
Lue, Hang-Ting et al. “BE-SONOS: A Bandgap Engineered SONOS with Excellent Performance and Reliability,” IEDM 2005 Tech. Digest, pp. 555-558, Dec. 2005.
Likahrev, Konstantin K. et al., :Layered tunnel barriers for nonvolatile memory devices, Appl. Phys. Letters, 73 (1998), pp. 2137-2139.

Affiliated with

Also associated with

Rating

Nonvolatile semiconductor memory device and operation method... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nonvolatile semiconductor memory device and operation method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device and operation method... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2726646