Voltage regulator for write/read assist circuit

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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Details

C323S284000, C323S285000, C323S286000, C323S222000, C323S234000

Reexamination Certificate

active

07863878

ABSTRACT:
A push-pull voltage regulator configured to selectively provide power to used portions of a memory array is presented. The push-pull voltage regulator includes a voltage-up regulator, which provides a reference voltage to an SRAM array, and a voltage-down regulator, which controls removal of excess charge from the SRAM array. The voltage-down regulator consists of a plurality of amplifier stages with a plurality of inputs, a plurality of inverters, a gain amplifier, a biasing transistor, and a NMOS drainage transistor. The gate terminal of the NMOS drainage transistor is coupled to an output of the voltage-down regulator. A first output terminal of the NMOS drainage transistor coupled to an output node of the push-pull voltage regulator and a second output terminal of the NMOS drainage transistor coupled to ground. When activated, the NMOS drainage transistor transfers excess charge from the SRAM array to ground.

REFERENCES:
patent: 2004/0100235 (2004-05-01), Lee
patent: 2005/0088158 (2005-04-01), Horiguchi et al.
patent: 2005/0134242 (2005-06-01), Gradinariu
patent: 2009/0303819 (2009-12-01), Park et al.

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