Method of manufacturing stacked-type semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated...

Reexamination Certificate

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C257S276000, C438S108000

Reexamination Certificate

active

07982279

ABSTRACT:
A method of manufacturing a stacked-type semiconductor device, including the steps of: forming dividing grooves, having a depth corresponding to a finished thickness for a plurality of first chips formed on the face side of a wafer, on the face side of the wafer along planned dividing lines; stacking existing second chips on the first chips; covering the face-side surfaces of the second chips with a protective member; and grinding the back side of the wafer until the dividing grooves are exposed and the first chips are thinned to the finished thickness, to obtain semiconductor devices of a two-layer structure.

REFERENCES:
patent: 2008/0006900 (2008-01-01), Chan et al.
patent: 2008/0032450 (2008-02-01), Huang
patent: A 2007-67082 (2007-03-01), None

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