Multichip package leadframe including electrical bussing

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S666000, C257S670000, C257S692000, C257SE23042, C257SE23043, C257SE23141, C361S611000, C361S813000

Reexamination Certificate

active

07902655

ABSTRACT:
Embodiments of the present invention provide electrical bussing for multichip leadframes. In various embodiments, a leadframe may comprise a first die paddle for receiving a first microelectronic device, a second die paddle for receiving a second microelectronic device, and at least one electrical bus disposed between the first die paddle and the second die paddle. In various ones of these embodiments, the electrical bus may be configured to supply a potential to at least one of the first and second microelectronic devices.

REFERENCES:
patent: 5998856 (1999-12-01), Noda et al.
patent: 6483189 (2002-11-01), Fukunaga
patent: 6903448 (2005-06-01), Sutardja et al.
patent: 7008825 (2006-03-01), Bancod et al.
patent: 2005/0194666 (2005-09-01), Huang et al.
patent: 2007/0045809 (2007-03-01), Wheless et al.

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