Method for metal bit line arrangement

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185110, C365S185160, C365S185170, C365S185180, C365S185250

Reexamination Certificate

active

07965551

ABSTRACT:
A method for metal bit line arrangement is applied to a virtual ground array memory having memory cell blocks. Each memory cell block has memory cells and m metal bit lines, wherein m is a positive integer. The method includes the following steps. First, one of the memory cells is selected as a target memory cell. When the target memory cell is being read, the metal bit line electrically connected to a drain of the target memory cell is a drain metal bit line, and the metal bit line electrically connected to a source is a source metal bit line. Next, a classification of whether the other metal bit lines are charged up when the target memory cell is being read is made. Thereafter, the m metal bit lines are arranged such that charged up metal bit lines are not adjacent to the source metal bit line.

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