Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2011-07-19
2011-07-19
Fan, Chieh M (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S356000, C375S358000, C375S359000, C375S371000
Reexamination Certificate
active
07983371
ABSTRACT:
A method is provided for offsetting a reference frequency of a quadrature reference clock signal. A quadrature reference clock (110) generates the quadrature reference clock signal at the reference frequency, while a quadrature variable offset clock (130) generates a quadrature clock signal at a base offset frequency based on a base offset value it receives from a control circuit (560). The base offset value can be determined in many ways, including reading it from a local memory (910) or receiving it from a remote device (1010). A polyphase mixer (140) performs a polyphase mixing operation between the quadrature reference clock signal and the offset clock signal to generate an agile clock signal having an agile clock frequency equal to the reference frequency plus the base offset frequency. If desired, the method can revise the offset frequency based on actual conditions and determine a corresponding revised offset value (920, 1020).
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McCorkle John W.
Miller Timothy R.
Fan Chieh M
Freescale Semiconductor Inc.
Ghulamali Qutbuddin
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