Shift register

Details Shift register Shift register

2011-04-12

2011-04-12

Lam, Tuan (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

C377S068000, C377S069000, C377S078000, C377S079000

Reexamination Certificate

active

07924967

ABSTRACT:
A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Snincludes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qnand configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qnto turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qnand configured to provide a first voltage to one of the input node Qnand the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Snand the pull-down circuit of one of the stage Sn−1and the stage Sn+1.

REFERENCES:
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patent: 2007/0086558 (2007-04-01), Wei et al.
patent: 2007/0104307 (2007-05-01), Kim et al.
patent: 2007/0217563 (2007-09-01), Chang et al.
patent: 2007/0290982 (2007-12-01), Kim et al.
patent: 2008/0055293 (2008-03-01), Kuo et al.

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