Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1998-06-26
2000-12-19
Chaudhuri, Olik
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438253, 257306, H01L 2120
Patent
active
061626988
ABSTRACT:
This invention relates to a method of manufacturing a capacitor in a semiconductor device. When forming a capacitor, just after forming the first ferroelectric PZT layer, supply of a DC bias voltage is maintained for a few minutes under the RF plasma before a cooling process, wherein then the cooling speed is rapidly increased so that a fine structure of the first PZT layer is transformed in the second PZT layer having a grain boundary of orientation polarization in the vertical direction and the domain structure. Just after forming the first ferroelectric PZT layer, after the RF plasma supply is shut off, an annealing process is performed for 5-20 minute at its temperature and then the cooling process is performed within 30 degree Celsius per minutes so that a fine structure of the first PZT layer is transformed to the second PZT layer having a grain boundary of orientation polarization in the vertical direction. Accordingly, electric characteristic of a capacitor can improve by preventing deterioration due to the endurance limit and the aging of the ferroelectric film.
REFERENCES:
patent: 5491102 (1996-02-01), Desu et al.
patent: 5508953 (1996-04-01), Fukuda et al.
patent: 5858851 (1999-01-01), Yamagata et al.
patent: 5913117 (1999-06-01), Lee
Lakeman, C.D.E., Rapid Thermal Processing of Sol-Gel Derived PZT 53/47 Thin Layers; Proceedings of the Ninth IEEE International Symposium on Applications of Ferroelectrics, 1994. P. 404-407.
Chaudhuri Olik
Hyundai Electronics Industries Co,. Ltd.
Peralta Ginette
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