Semiconductor package and method for manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S750000, C257S758000, C438S618000, C438S637000, C438S652000

Reexamination Certificate

active

07964963

ABSTRACT:
A semiconductor package of this invention includes external electrode pad5which is formed by a conductive member that is made either of conductive resin or conductive ink, which is connected to an internal circuit of a semiconductor device, and which is to be electrically connected to an external portion, plating layer6which is provided on an entire surface of external electrode pad5, and insulating resin layer7which covers plating layer6on a peripheral edge of external electrode pad5, and which exposes a portion of plating layer6on external electrode pad5.

REFERENCES:
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patent: 2002208655 (2002-07-01), None
patent: 2003174118 (2003-06-01), None
patent: 2003324119 (2003-11-01), None
patent: 2005217445 (2005-08-01), None
patent: 2006057360 (2006-06-01), None
International Search Report for PCT/JP2007/069251 mailed Dec. 25, 2007.
Chinese Office Action for CN200780037348.6 dated Feb. 5, 2010.

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