Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2011-05-03
2011-05-03
Proctor, Jason (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S013000
Reexamination Certificate
active
07937256
ABSTRACT:
A method of efficient library characterization of a circuit of a logic gate having a plurality of transistors and a plurality of nodes defining interconnection points in the circuit is disclosed. The method includes determining a plurality of vectors for a plurality of arcs. Each of the plurality of vectors represents possible data bits to inputs and nodes of the logic gate. The method selects a plurality of substantially distinct vectors from the plurality of vectors for each of the plurality of arcs, and performs circuit pruning for each of the plurality of substantially distinct vectors, taking each one substantially distinct vector at a time. The circuit pruning includes identifying an active circuit for each vector. The active circuit is identified by determining which circuit features are activated when applying a particular one of the substantially distinct vectors. Then, the circuit simulations limited to a plurality of transistors in the active circuit are performed. The circuit pruning and circuit simulations are repeated for remaining ones of the plurality of substantially distinct vectors. The results of the circuit simulations are then stored on a non-volatile compute readable media, for each active circuit corresponding to each of the plurality of substantially distinct vectors.
REFERENCES:
patent: 2002/0042704 (2002-04-01), Najm et al.
R. D. Freeman et al., “Automated Extraction of SPICE Circuit Models from Symbolic Gate Matrix Layout with Pruning”, 1986, IEEE, pp. 418-424.
Emrah Acar et al., “Leakage and Leakage Sensitivity Computation for Combinational Circuits”, 2003, ACM, pp. 96-99.
Luis Guerra e Silva et al., “Algorithms for solving Boolean satisfiability in combinational circuits”, 1999, ACM, pp. 1-5.
Dan Souder et al., “JSPICE: a component-based distributed Java front-end for SPICE”, 1998, Concurrency: Practice and Experience, pp. 1131-1141.
Chou Kevin
Tseng Ken
Altos Design Automation, Inc.
Martine & Penilla & Gencarella LLP
Proctor Jason
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