Metal working – Barrier layer or semiconductor device making – Barrier layer device making
Reexamination Certificate
2011-08-02
2011-08-02
Trinh, Minh (Department: 3729)
Metal working
Barrier layer or semiconductor device making
Barrier layer device making
C029S025410, C029S025420, C361S311000, C361S306200, C438S106000
Reexamination Certificate
active
07988744
ABSTRACT:
A method of producing capacitor structure includes, in at least one aspect, arranging first layer, adjacent first and second polarity conducting strips, the first layer conducting strips arranged as respective piecewise “S” shaped paths; arranging second layer, adjacent first and second polarity conducting strips, the second layer conducting strips arranged as respective piecewise “S” shaped paths, the second layer second polarity conducting strip is arranged overlying and electrically separated from the first layer first polarity conducting strip, and the second layer first polarity conducting strip is arranged overlying and electrically separated from the first layer second polarity conducting strip; electrically connecting the first layer first polarity conducting strip with the second layer first polarity conducting strip; and electrically connecting the first layer second polarity conducting strip with the second layer second polarity conducting strip.
REFERENCES:
patent: 3034445 (1962-05-01), Pelladeau
patent: 3255324 (1966-06-01), Ovshinsky
patent: 3460010 (1969-08-01), Domenico et al.
patent: 4017820 (1977-04-01), Ross
patent: 4409608 (1983-10-01), Yoder
patent: 4419713 (1983-12-01), Levinson
patent: 4423371 (1983-12-01), Senturia et al.
patent: 4481487 (1984-11-01), Brelm et al.
patent: 4890192 (1989-12-01), Smith
patent: 4929998 (1990-05-01), Boudewijns
patent: 4937649 (1990-06-01), Shiba
patent: 4949217 (1990-08-01), Ngo
patent: 4972252 (1990-11-01), Maekawa
patent: 5053351 (1991-10-01), Fazan et al.
patent: 5172299 (1992-12-01), Yamada et al.
patent: 5208725 (1993-05-01), Akcasu
patent: 5245505 (1993-09-01), Shiga et al.
patent: 5583359 (1996-12-01), Ng et al.
patent: 5903493 (1999-05-01), Lee
patent: 6001702 (1999-12-01), Cook et al.
patent: 6124624 (2000-09-01), Van Roosmalen et al.
patent: 6150707 (2000-11-01), Cook et al.
patent: 6266226 (2001-07-01), Hayashi
patent: 6266227 (2001-07-01), Konushi et al.
patent: 6312963 (2001-11-01), Chou et al.
patent: 6414806 (2002-07-01), Gowda et al.
patent: 6445056 (2002-09-01), Nakashima
patent: 6459561 (2002-10-01), Galvagni et al.
patent: 6501610 (2002-12-01), Sugawara et al.
patent: 6570210 (2003-05-01), Sowlati et al.
patent: 6597562 (2003-07-01), Hu et al.
patent: 6635916 (2003-10-01), Aton
patent: 6815739 (2004-11-01), Huff et al.
patent: 6980414 (2005-12-01), Sutardja
patent: 7116544 (2006-10-01), Sutardja
patent: 7327551 (2008-02-01), Chien et al.
patent: 7578858 (2009-08-01), Sutardja
patent: 76 35 588 (1978-02-01), None
patent: 41 13 576 (1991-10-01), None
patent: 995334 (1965-06-01), None
patent: 1 247 985 (1971-09-01), None
patent: 2 060 253 (1981-04-01), None
patent: 42-5946 (1942-03-01), None
patent: 52-122674 (1951-03-01), None
patent: 52-122675 (1951-03-01), None
patent: 56-16936 (1954-07-01), None
patent: 56-96620 (1954-12-01), None
patent: 57-157128 (1956-03-01), None
patent: 57-157129 (1956-03-01), None
patent: 57-215803 (1962-01-01), None
patent: 46-24658 (1971-07-01), None
patent: 46-43172 (1971-12-01), None
patent: 50-42369 (1975-04-01), None
patent: 53-61051 (1978-06-01), None
patent: 54-101153 (1979-08-01), None
patent: 57-52120 (1982-03-01), None
patent: 52-051552 (1983-03-01), None
patent: 58-051552 (1983-03-01), None
patent: 58-56432 (1983-04-01), None
patent: 58-66632 (1983-05-01), None
patent: 58-097854 (1983-06-01), None
patent: 58-159367 (1983-09-01), None
patent: 59-91718 (1984-06-01), None
patent: 59-105341 (1984-06-01), None
patent: 59-105341 (1984-06-01), None
patent: 59-132613 (1984-07-01), None
patent: 59-197122 (1984-11-01), None
patent: 59-222959 (1984-12-01), None
patent: 222959 (1984-12-01), None
patent: 60-1825 (1985-01-01), None
patent: 60-4207 (1985-01-01), None
patent: 60-92604 (1985-05-01), None
patent: 60-102725 (1985-06-01), None
patent: 60-102726 (1985-06-01), None
patent: 60-102727 (1985-06-01), None
patent: 61-55936 (1986-03-01), None
patent: 61-57513 (1986-04-01), None
patent: 61-259560 (1986-11-01), None
patent: 61-263251 (1986-11-01), None
patent: 64-084616 (1989-03-01), None
patent: 01-096943 (1989-04-01), None
patent: 01-120858 (1989-05-01), None
patent: 01-133354 (1989-05-01), None
patent: 2-47024 (1990-03-01), None
patent: 02-086160 (1990-03-01), None
patent: 02-090561 (1990-03-01), None
patent: 03-257855 (1990-03-01), None
patent: 02-178963 (1990-07-01), None
patent: 02-191369 (1990-07-01), None
patent: 03-096267 (1991-04-01), None
patent: 03-133169 (1991-06-01), None
patent: 3-79416 (1991-08-01), None
patent: 03-181165 (1991-08-01), None
(Non-English Translation), Toshio Sudo, “Interconnect Capacitances and Crosstalk Noices on GaAs LSI's”, R&D Center, Toshiba Corp.
“Conference Proceedings of the 14thEuropean Microwave Conference,” Sep. 1984, SITEL—The SociétéBelge Des Ingénieurs De Télécommunications Et D' Electronique, pp. 853-858.
“Gallium Arsenide Processing Techniques,” 1984.
“Gallium Arsenide,” Jan. 1988, Colloquium Digest No: 1988/17.
“Micro Electro Mechanical Systems,” Feb. 1989, IEEE Catalog No. 89THO249-3.
“Microwave Theory and Techniques,” Apr. 1978, IEEE Trans. Microwave Theory Tech., vol. MTT-26, No. 4.
“Monolithic Circuits Symposium,” Jun. 1991, IEEE Catalog No. 91CH3016-3.
“Switched Capacitor-Filler Dynamic Tuning Mechanism”, Feb. 1987, No. 274, Kenneth Mason Publications, Ltd., London, England.
“Technology Growth for the 80's,” May 1980, IEEE Catalog No. 80CH1545-3 MTT.
Alley, G., “Interdigital Capacitors and Their Application to Lumped-Element Microwave Integrated Circuits,” Dec. 1970, IEEE Trans. Microwave Theory Tech., vol. MTT-18, No. 12.
Aparicio, R., and Hajimiri A., “Capacity Limits and Matching Properties of Lateral Flux Integrated Capacitors,” 2001, Pasadena, California, Department of Electrical Engineering, California Institute of Technology.
Benecke W., Petzold, H.-C., “Micro Electro Mechanical Systems,” Feb. 1992, IEEE Catalog No. 92CH3093-2.
Benedek, P., “Capacitances of a planar multiconductor configuration on a dielectric substrate by a mixed order finite-element method,” May 1976, IEEE Trans. Circuits and Systems, vol. 23, No. 5, pp. 279-284.
Ch'en, D. et al., “Devices & Monolithic Circuit Elements” 1984, IEEE MTT-S Digest.
Chan, C., “Analysis of MMIC Structures Using an Efficient Iterative Approach,” Jan. 1983, IEEE Trans. Microwave Theory Tech., vol. 36, No. 1.
Cohen, S., “A Novel Metal-Insulator-Metal Structure for Field-Programmable Devices,” Jul. 1998, IEEE Trans. Electron Devices, vol. 40, No. 7.
Delrue, R. et al., “The Effects of a Dielectric Capacitor Layer and Metallization on the Propagation Parameters of Coplanar Waveguide for MMIC,” Aug. 1988, IEEE Trans. Microwave Theory Tech., vol. 36, No. 8.
Esfandiari, R. et al., “Design of Interdigitated Capacitors and their Application to Gallium Arsenide Monolithic Filters,” Jan. 1983, IEEE Trans. Microwave Theory Tech., vol. 31, No. 1.
G.D. Alley, “Interdigital Capacitors for Use in Lumped-Element Microwave Integrated Circuits”, May 1970, vol. 70, Issue 1, IEEE Xplore.
G.L. Matthael, “Interdigital Band-Pass Filters”, Nov. 1962, vol. 10, Issue 6, IEEE Xplore.
IEEE Transactions, “Microwave Theory and Techniques”, vol. 38, No. 12, Dec. 1990, Publication of the IEEE Microwave Theory and Techniques Society.
IEEE Transactions, “Microwave Theory and Techniques”, vol. MTT 31, No. 1, Jan. 1983, Publication of the IEEE Microwave Theory and Techniques Society.
Ingo Wolff et al. “Computerized Microwave Circuit Layout and Mask Generation, Computer Models for MMIC Capacitors and Inductors”, 14th European Microwave Conference, Sep. 1984.
Kollipara, R. et al.,Modeling and Design of Interdigital Structure, Nov. 1991, IEEE Trans. Electron Devices, vol. 38, No. 11.
Lin, J.,Two dimensional and three-dimensional int
Marvell International Ltd.
Trinh Minh
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