Semiconductor memory device and its topography

Details Semiconductor memory device and its topography Semiconductor memory device and its topography

1991-06-12

1993-11-16

Wambach, Margaret R.

Static information storage and retrieval

Addressing

Plural blocks or banks

365 63, G11C 506

Patent

active

052630021

ABSTRACT:
In the semiconductor memory device, memory cells are divided into plural blocks; each block is further divided into plural I/O unit groups; and furthermore each I/O unit group is divided into plural small groups. The word lines provided for each small group of memory cells arranged at similar locations in each unit group are connected in common to a word line selecting line selected by a select circuit. Therefore, the number of memory cells connected to one word line can be reduced to decrease the power consumption and to increase the operating speed, without increasing the wiring capacitance and the chip size.

REFERENCES:
patent: 4636982 (1987-11-01), Takemae et al.
patent: 4931994 (1990-06-01), Matsui et al.
patent: 5014246 (1991-05-01), Komatsu et al.
patent: 5150330 (1992-09-01), Hag

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