Semiconductor memory device capable of lowering a write voltage

Details Semiconductor memory device capable of lowering a write voltage Semiconductor memory device capable of lowering a write voltage

2011-08-23

2011-08-23

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185170, C365S185180, C365S185190

Reexamination Certificate

active

08004889

ABSTRACT:
A memory cell array is configured so that a plurality of memory cells storing one value of an n value (n is a natural number more than 2) are arranged in a matrix. A control circuit controls the voltage of a word line and a bit line in accordance with input data. The control circuit supplies a first voltage to a word line of a selected cell in a write operation, and supplies a second voltage to at least one word line adjacent to the selected cell. Thereafter, the control circuit changes a voltage of the at least one word line adjacent to the selected cell from the second voltage to a third voltage (second voltage<third voltage), and further, changes the voltage of the word line of the selected cell from the first voltage to a fourth voltage (first voltage<fourth voltage).

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