Programming of a solid state memory utilizing analog...

Details Programming of a solid state memory utilizing analog... Programming of a solid state memory utilizing analog...

2011-07-26

2011-07-26

Phan, Trong (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185170, C365S185180, C365S185240, C365S185290, C365S185330

Reexamination Certificate

active

07986553

ABSTRACT:
Memory devices adapted to receive and transmit analog data signals representative of bit patterns of two or more bits facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. Programming of such memory devices includes preprogramming erased memory cells that are to be programmed to a known Vtthat is less than the smallest Vtof the possible programmable states. Thus, the subsequent programming pulses start programming all cells from the known threshold voltage.

REFERENCES:
patent: 5095344 (1992-03-01), Harari
patent: 5122985 (1992-06-01), Santin
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5237535 (1993-08-01), Mielke et al.
patent: 5297148 (1994-03-01), Harari et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5359558 (1994-10-01), Chang et al.
patent: 5400286 (1995-03-01), Chu et al.
patent: 5467306 (1995-11-01), Kaya et al.
patent: 5619454 (1997-04-01), Lee et al.
patent: 5671299 (1997-09-01), Oshida
patent: 5732019 (1998-03-01), Urai
patent: 5815425 (1998-09-01), Wong et al.
patent: 5847991 (1998-12-01), Tong et al.
patent: 5909393 (1999-06-01), Tran et al.
patent: 5909397 (1999-06-01), San et al.
patent: 5936971 (1999-08-01), Harari et al.
patent: 5982670 (1999-11-01), Yamashita
patent: 6069822 (2000-05-01), Canegallo et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6426898 (2002-07-01), Mihnea et al.
patent: 6438037 (2002-08-01), Fastow et al.
patent: 6493280 (2002-12-01), Mihnea et al.
patent: 6549456 (2003-04-01), Werner et al.
patent: 6563741 (2003-05-01), Mihnea et al.
patent: 6735114 (2004-05-01), Hamilton et al.
patent: 6762956 (2004-07-01), Mori et al.
patent: 6930926 (2005-08-01), Lin et al.
patent: 6952368 (2005-10-01), Miura et al.
patent: 6975537 (2005-12-01), Lutze et al.
patent: 7006379 (2006-02-01), Noguchi et al.
patent: 7020017 (2006-03-01), Chen et al.
patent: 7088621 (2006-08-01), Guterman et al.
patent: 7161833 (2007-01-01), Hemink
patent: 7224619 (2007-05-01), Liao et al.
patent: 7230851 (2007-06-01), Fong et al.
patent: 7251158 (2007-07-01), Hsia et al.
patent: 7345918 (2008-03-01), Yip
patent: 7366020 (2008-04-01), Choi
patent: 7391654 (2008-06-01), Aritome
patent: 7403430 (2008-07-01), Liu et al.
patent: 7433244 (2008-10-01), Yoon et al.
patent: 7457178 (2008-11-01), Tu et al.
patent: 7580286 (2009-08-01), Yip
patent: 2005/0251617 (2005-11-01), Sinclair et al.
patent: 2009/0310416 (2009-12-01), Yip
Patent Interference No. 105,642, Harari v. Lee, Aug. 11, 2009, 44 pgs.
Patent Interference No. 105,645, Mihnea v. Harari, Aug. 17, 2009, 45 pgs.

Affiliated with

Also associated with

Rating

Programming of a solid state memory utilizing analog... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programming of a solid state memory utilizing analog..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programming of a solid state memory utilizing analog... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2674063