Semiconductor memory device provided with memory cells...

Details Semiconductor memory device provided with memory cells... Semiconductor memory device provided with memory cells...

2011-04-05

2011-04-05

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185180, C365S185210

Reexamination Certificate

active

07920421

ABSTRACT:
A semiconductor memory device includes a memory cell, a source line, and a source line control circuit. The memory cell includes a charge storage layer and a control gate and is capable of holding 2 levels or more levels of data. The source line is electrically connected to a source of the memory cell. The source line control circuit detects a current passed to the source line and controls a potential of the source line in accordance with a detected current amount in a reading operation or a verification operation of the data.

REFERENCES:
patent: 5654920 (1997-08-01), Watsuji et al.
patent: 5889702 (1999-03-01), Gaultier et al.
patent: 2002/0027233 (2002-03-01), Yamaki et al.
patent: 2002/0139999 (2002-10-01), Hirano
patent: 2008/0094903 (2008-04-01), Maejima et al.
patent: 2006-107709 (2006-04-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device provided with memory cells... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device provided with memory cells..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device provided with memory cells... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2673696