Non-volatile memory device capable of storing multi-state data

Static information storage and retrieval – Floating gate – Particular biasing

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365 45, 365168, G11C 1156

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active

052629848

ABSTRACT:
The input data comprising binary data to be stored are converted into multi-state data. A voltage of a level based on the converted multi-state data is applied to a source region to perform write operation to a memory transistor. As a result, the threshold voltage of the transistor is set to a value corresponding to the potential of the source region. In read operation a drain current generated in the memory transistor is detected and the multi-state data corresponding to the current are obtained. These multi-state data are converted into binary data to be outputted as output data.

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IBM Technical Disclosure Bulletin: "Three-state MNOS FET Memory Array", vol. 18 No. 12 May 1976.
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IEEE Journal of Solid State Circuits: "A Four-State EEPROM Using Floating-Gate Memory Cells", by C. Bleiker et al, vol. SC-22, No. 3, Jun. 1987, pp. 460-463.

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