Metal treatment – Compositions – Heat treating
Patent
1978-04-27
1980-10-28
Rutledge, L. Dewayne
Metal treatment
Compositions
Heat treating
29571, 148187, 357 45, 357 91, G11C 1140, G11C 1700
Patent
active
042305047
ABSTRACT:
An MOS read only memory or ROM is formed by a process compatible with standard N-channel silicon gate ROM manufacturing methods. Instead of moat programming or contact programming as is used in almost all standard processes, however, the ROM is programmed by implant after the polysilicon level of gates and interconnection has been deposited and patterned and prior to metal deposition. Address lines and gates are polysilicon, ground lines are defined by elongated N+ regions, and output lines are metal strips contacting the N+ diffused drains. Each potential MOS transistor in the array is programmed to be a logic "1" or "0" by ion implanting through the polysilicon gates and thin gate oxide, using patterned photoresist as a mask prior to application of the polycrystalline silicon.
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Graham John G.
Roy Upendra
Rutledge L. Dewayne
Texas Instruments Incorporated
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