Content addressable memory device for simultaneously...

Details Content addressable memory device for simultaneously... Content addressable memory device for simultaneously...

2011-03-15

2011-03-15

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Associative memories

C365S049170, C365S049180

Reexamination Certificate

active

07907432

ABSTRACT:
A CAM device includes a CAM array coupled to a programmable priority encoding (PPE) logic circuit. The CAM array concurrently compares multiple input data with stored data to generate corresponding match results that are provided to the PPE logic circuit. The PPE logic circuit selectively favors the match results of a selected flow over the match results of the other flows in response to a flow select signal, which can be toggled to alternately select the match results of various flows. In this manner, the match results of the selected flow are generated and output even if the HPM index of the selected flow is of a lower priority than those of the non-selected flows, thereby ensuring an even distribution of match results reporting between different flows.

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International Searach Report, Written Opinion and Notice of Transmittal of same mailed Sep. 15, 2010 in International Application No. PCT/US2010/039605.

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