Semiconductor device having an increased area of one of the...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S758000, C257S686000, C257S782000, C257S783000, C438S109000, C438S118000, C438S622000, C438S406000, C438S455000

Reexamination Certificate

active

07986045

ABSTRACT:
In this semiconductor device, connection parts between wafers are electrically insulated from each other, and a junction face shape of second electrical signal connection parts is larger than the shape of a positioning margin face that is formed by an outer shape when the periphery of a minimum junction face, which has half the area of a junction area of the first electrical signal connection part, is enclosed by a same width dimension as a positioning margin dimension between the first wafer and the second wafer.

REFERENCES:
patent: 2007/0045836 (2007-03-01), Kwon et al.
patent: 2007/0269931 (2007-11-01), Chung et al.
patent: 2007-59769 (2007-03-01), None
patent: WO-2007/024022 (2007-03-01), None

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