Semiconductor device

Details Semiconductor device Semiconductor device

2011-08-02

2011-08-02

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

C257S750000, C257S758000, C257SE23011, C257SE23012

Reexamination Certificate

active

07989952

ABSTRACT:
A semiconductor device having macro circuit including a plurality of fine interconnections, an extension interconnection wider than the fine interconnections, having a first end connected to one or more of the fine interconnections and a second end located in an area of the semiconductor device external to the macro circuit, and one or more of the fine interconnections widened towards the connection to the extension wiring interconnection. The extension interconnection is formed in the same layer as one or more of the interconnections connected to the extension interconnection.

REFERENCES:
patent: 5289036 (1994-02-01), Nishimoto
patent: 5581109 (1996-12-01), Hayashi et al.
patent: 5923072 (1999-07-01), Wada et al.
patent: 6518663 (2003-02-01), James et al.
patent: 7388279 (2008-06-01), Fjelstad et al.
patent: 2005-259968 (2005-09-01), None
Advanced Process Technology 2003, Backend Process: Section 5. 200nm pitch double layer Cu interconnection TEG and module results, URL: http://www.selete.co.jp/SeleteHPJ1/j—ht ml/research/re0022.html, research date is Feb. 1st, 2005.
Chinese Office Action dated Apr. 10, 2009 with English Translation.

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