Semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185180

Reexamination Certificate

active

07986561

ABSTRACT:
A semiconductor memory device comprises memory cells which includes a selection transistor and a memory transistor; selection gate lines coupled to a gate of the selection transistor; control gate lines coupled to the control gate of the memory transistor; source lines coupled to a source of the memory transistor; bit lines coupled to the selection transistor; a selection gate line driver circuit; a control gate line driver circuit; and a source line driver circuit, wherein the selection gate line driver circuit comprises a first transistor including a first gate insulation film and drives the selection gate line with a first driving voltage, and the control gate line driver circuit and the source line driver circuit comprise a second transistor including second gate insulation films and drive the control gate line and the source line with a boost voltage higher than the first driving voltage.

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patent: 2006-294142 (2006-10-01), None

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