Semiconductor memory device and data write method thereof

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030, C365S185230

Reexamination Certificate

active

07948804

ABSTRACT:
A semiconductor memory device includes a control circuit. The control circuit executes control to perform a verify operation with respect to only a lowest threshold voltage level of a memory cell at a time of a data write operation, and to skip the verify operation with respect to the other threshold voltage levels. The control circuit determines whether a verify pass bit number of the lowest threshold voltage level, which is counted by a bit scan circuit, is a prescribed bit number or more, and the control circuit further executes control, if the verify pass bit number is the prescribed bit number or more, to perform the verify operation with respect to only the lowest threshold voltage level and a threshold voltage level that is higher than the lowest threshold voltage level, and to skip the verify operation with respect to the other threshold voltage levels.

REFERENCES:
patent: 6507518 (2003-01-01), Hosono et al.
patent: 7073103 (2006-07-01), Gongwer et al.
patent: 2004/0156239 (2004-08-01), Funaki
patent: 2007/0234144 (2007-10-01), Gongwer et al.
patent: 2007/0297236 (2007-12-01), Tokiwa
patent: 2008/0198659 (2008-08-01), Honma et al.

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