Method and apparatus for powering down analog integrated...

Details Method and apparatus for powering down analog integrated... Method and apparatus for powering down analog integrated...

2011-01-25

2011-01-25

Zweizig, Jeffrey S (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S563000

Reexamination Certificate

active

07876146

ABSTRACT:
A method and an apparatus powers down an analog integrated circuit. A power down circuit is electrically coupled to the analog circuit and is adapted to power down the analog circuit in response to receiving a power down signal. A node protection circuit is electrically coupled to the analog circuit and is adapted to provide a predetermined voltage potential to at least one predetermined node in the analog circuit in response to receiving the power down signal when a voltage potential at the at least one predetermined node is not determined by the power down circuit.

REFERENCES:
patent: 6525607 (2003-02-01), Liu
patent: 6888410 (2005-05-01), Li
patent: 7019578 (2006-03-01), Koto
patent: 7119616 (2006-10-01), Benzer
International Search Report-PCT/US2008/063071, International Searching Authority-European Patent Office-Sep. 3, 2008.
Written Opinion-PCT/US2008/063071, International Searching Authority-European Patent Office-Sep. 3, 2008.

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