Semiconductor memory device having a short write time

Details Semiconductor memory device having a short write time Semiconductor memory device having a short write time

1997-12-31

2000-05-16

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

365200, 36523003, G11C 800

Patent

active

06064625&

ABSTRACT:
The present invention internally latches a write data signal applied in synchronous with an external data strobe signal in response to an internal data strobe signal which is generated in response to this external data strobe signal, and furthermore, supplies the write data signal to a memory cell array from a write circuit such as a write amplifier in response to a write signal generated from this external data strobe signal. Meanwhile, an address signal is introduced internally in accordance with an external clock. Therefore, since the driving of the data bus connected to a memory cell array from a write amplifier, which constitutes a write operation internal to memory, commences in accordance with an external data strobe signal, a write operation can be ended in the shortest possible time from write data signal input. The above-described invention is especially effective when memory comprises a 2-bit pre-fetch. That is, a 2-bit write data signal is supplied time-sequentially in synchronous with an external data strobe signal. Since an internal write operation can commence after receiving for the input of that second write data signal, it enables the shortest write operation.

REFERENCES:
patent: 5546346 (1996-08-01), Agata et al.
patent: 5592434 (1997-01-01), Iwamoto et al.
patent: 5802596 (1998-09-01), Shinozaki

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