Clock data restoring device

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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Details

C375S371000

Reexamination Certificate

active

07965802

ABSTRACT:
The clock data restoration device1is a device which restores a clock signal and data on the basis of an input digital signal and comprises an equalizer section10, a sampler section20, a clock generation section30, an equalizer control section40, and a phase monitor section50. As a result of the loop processing of the equalizer section10, the sampler section20, and the equalizer control section40, a control of a level adjustment amount of the digital signal by the equalizer section10is carried out. However, the control is stopped by the phase monitor section50when the phase difference between the clock signal CK and the digital signal is greater than a predetermined value. As a result, a clock signal and data can be restored more accurately.

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patent: 2010/0046601 (2010-02-01), Momtaz et al.
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patent: 2007/058279 (2007-05-01), None

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